Read-write non-volatile memories, such as floating gate based or SONOS memories require complex algorithms to correctly perform basic operations. For example, a program operation usually includes providing a program pulse, performing a read with some margin, and repeating these two steps until all the cells reach desired threshold values. Three-dimensional memories, due to the intrinsic nature of TFT devices, e.g. greater variations and a limited threshold window, would likely require algorithms that are even more complicated than those typically applied to memories built on single crystal silicon. Moreover, these algorithms may need to be adjusted and changed as more is learned about three-dimensional memory technology. There is a need to address the requirements of implementing these complex algorithms in a simple, easy to modify and portable way.
Accordingly, there is a need for an improved system and method of controlling three-dimensional memories.